Chapter 12 - Atomic Caesium Clock

ESO LA SILLA OBSERVATORY CLOCK SYSTEM

A.- GENERAL.

Actually La Silla have a mixture of clock system. The older one (1975) is the Atomic Cesium Clock. Today the NTT have a completely different system GPS based. The NTT signal was sended to the 3.6m telescope. In adition, there are new projects to give a GPS signal to all the rest of telescopes all over La Silla. This Atomic Cesium clock have right now problem with is natural obsolescence because its spare parts and the atomic cell itself. In the future the Cesium Clock wiil be consuder as a back up of the GPS system.

The cesium clock system described below is intented to provide the following features:

To fullfill those requirements the clock system is designed as follow:

Figure 1 shows the block diagram of the Time generation assembly which contains the following parts:

B.- TIME BASE STATION

This part of the clock system contains the high precision frequency source and the time keeping module.

B1.- Cesium Frequency Standard

The requirement for accuracy implies the use of a cesium beam oscillator as primary frequency source.

Model proposed is referenced XSC manufactured by RHODE & SCHWARZ (specification in the electronic laboratory)

B2.- Time Keeping Module

This is a standard module (ref CADM) manufactured by RHODE & SCHWARZ

This unit which fits mechanically in XSC cabinet allows the following performances:

C.- TIME DISTRIBUTION CENTER

The time Distribution Center consists of a quartz cristal frequency source (and handler), Time code generators and Distribution Amplifier Unit.

Its purpose is to deliver IRIG B codes to the lines which connect remote users to the time source.

C1.- Frequency Unit (figure 2)

C1.1.- Specifications

C1.2.- Local Frequency Source

The primary clock contains a local frequency source in from of a quartz cristal oscillator.

Model prposed is referenced 1 0 544 B, manufactured by HEWLETT-PACKARD

C1.3.- Frequency handling operation on frequency sources are:

C1.4.- Frequency distribution

The switched 5 Mhz logic signal is routed to output logic amplifiers (3 outputs) in order to drive the Time Code Generators of the Time Distribution Center

The 1 Hz input pulse is buffered in 4 amplifiers; three of them are intented to feed Time Code Generators; the last is a spare one.

C1.5.- Local oscillator locking (figure 3)

The purpose of this device is to lock the phase of the local oscillator on that of the external reference.

The schematic shows the different parts

C2.- Universal / Sideral Time Code Generator (figure 4)

C2.1.- Specifications

C2.2.- ST Frequency Generator

ST second is related to UT second by the equation:

The ratio can also be obtained by dividing 50.000 by (49863 + 375 / 784) with an error of 5.3 X

This is done by implementing a 49863 / 49864 counter and 750 followed by a 34 counter on a 5 Mhz to output a 100 hz sideral frequency.

C2.3.- IRIG B carrier generator

This carrier has a frequency of 1000 Hz; to obtain this value starting from a 100 Hz signal one must perform a frequency multiplication (X10)

This is done by a phase - lock loop which is fed by 100 Hz sideral generated as described; it constains:

NB This device is also used in case of UT generation; this procedure simplifies considerably switching between UT and ST generation.

C2.4.- Clock

- UT 100 Hz generator

Is obtained by dividing the incoming frequency at 5 Mhz by 50.000. A group of thumbswitches allows advance of local UT from 0 to 9999 us versus 1Hz reference UT coming from primary clock.

NB This procedure is available only in UT; for ST the synchronisation procedure is as follows:

C2.5.- IRIG B Code Generator

It uses 3 sub-assemblies:

- Serializer

Parallel BCD time information (on 20 bits) is serialized by multiplexing technic: rate of multiplexing and bit position in message are extracted from 100 Hz to 1 Hz divider.

- Pulse duration modulation

IRIG B modulation uses 3 durations:

Modulation is performed by multiplexing technic using NRZ output of serializer as data input and 1000 Hz to 1 Hz counter outputs as address inputs.

- Amplitude modulation

IRIG B standard requires for a sine 1000 Hz carrier with an amplitude modulation of 1/3; this is done by varying an Op Amp gain with a field effect transistor used as a switch.

Output is 2,2 Vpp with 50 ohms impedance.

C2.6.- IRIF B Monitoring

It of most importance to check, to some extent, validity of IRIG B output; as the critical point of the chain is in the output amplifier, we implement a monitoring circuit which acts as the input circuit of a remote terminal, i.e., which demodulates the IRIG B code and compare this demodulated signal to the modulating one at input of amplitude modulator; any difference is detected and generates an alarm signal.

C3.- Distribution Amplifier Unit (figure 5)

This unit provides bufferisation and distribution of IRIG B code along the transmittion lines.

C3.1.- Specification

Inputs

IRIG B code (3inputs).

Outputs

Two froups of 15 lines each, 2,2 Vpp level with 150 source impedance.

Controls

- Two 3 positions rotary switches to route one of the 3 IRIG B input code to the desired output group

- Lamp on front panel to indicate power source in use (mains / battery)

C3.2.- Design

The two groups are housed in the same unit. However, to maintain a high level of reliability each group has its own power supply.

In each group we find 15 amplifiers driven by the common of the source selector switch.

line output is electrically isolated by a transformer.

D.- CLOCK SYSTEM GENERAL DESIGN

D1.- Power Supply

Units in the Time Base Station and Distribution Center are powered by two sources.

- AC source in normal operation

- DC source in case of AC source failure.

Autonomies on DC source has been fixed to 8 hours for the Time Base Station (cesium standard + Time keeping module) and hour for the distribution center (Frequency unit + Time Code Generator + Distribution Amplifier Unit).

The general concept retained is that each unit has two power inputs.

- AC line output at 220 V +/- 10% and 50 Hz +/- 2 Hz

- DC line input in range of 22 to 30 V

DC input are fed by battery tailored to the required autonomy.

D1.1.- Unit power supply circuitry (figure 6)

In each unit we find:

- An AC line power transformer followed by a rectifier and filtering cell; this subsystem furnishes a non regulated lightly smoothed DC voltage

- A second small transformer (to measure AC line voltage) and a circuitry to drive a serie pass transistor which switches, on or off the DC input.

- As many DC to DC converters as needed to provide the DC internal voltage of the unit.

Performance:

D1.2.- DC Sources

Each DC source consists of:

- A battery pack using sealed cadmium - Nickel cells with adequate capacity

- A Charger with two ratings: fast charging during a short time, slow continuous mode

We retained the following equipement

- One pack with 280 WH capacity (minimum needed is 250 WH for 8 hours autonomy) for the cesium beam beam frequency standard and the time keeping module

- One pack with 280 WH capacity (minimum needed is 180 WH for 1 hour autonomy) for the Time Distribution Center.

D2.- Packaging and Technology

As far as possible, components are choosen in CCTU (French Standardization Organization) lists.

- Semiconductors are silicium for discrete types and TTL low power schotky (LS) for integrated types, with few parts in TTL.

- Components are used at worst case charge coefficient 20% below their maximum ratings for voltage and 50% for power.

- Components are hand or machine soldered on double side plated through holes printed circuits boards with a 52 pins gold etched connector.

- Interconnection between card connectors is mode in "miniwrapping" technic.

- I/O connectors are BNC socket and multipin rectangular CANNON D serie.

D3.- Mechanical

D3.1.- Time base Station

Time base station consist of cesium frequency standard (and its Time module) and battery pack

Those two units are tigthted together with a special mechanic assembly and may be installed in either.

- a small 8 units height cabinet (about 400 mm) easy to transport (in order to check clock synchronism against observatories)

- The standard 19" cabinet of the Time distribution center.

D3.2.- Time Distribution Center

All units are housed in 19 inches wide, 2 panel unit height (88 mm) and 500mm depth; they are mounted with streching slides in a cabinet of 36 PU usuable height (manufacturer: TRANSRACK, serie AMBIANCE, color: brown

- this cabinet will receive the Time Base Station assembly during normal operation.

E.- REMOTE TERMINALS

Purpose of those devives is to provide time information at remote places from the Time Center. The media used to vehicle information is the IRIG B serie code. Units may indiferently handle ST or UT IRIG B codes.

E1.- Specification

E1.1.- Input

IRIG B code with level in the range of 0,2 Vpp t 5 Vpp

E1.2.- Output

- BCD time in parallel from seconds to hours on 20 lines; true TTL level fan out of 3,2 mA

- 1Khz pulse TTL compatible (F.o=3,2 mA)

- 1Khz pulse (0,8 duty cycle), some fan-out.

- IRIG B; this is only a duplication of the input connection provided to make easier connection of devices in "daisy" chain.

E1.3.- Power Supply

- AC line 220 V +/-10% at 50 Hz +/-2Hz; no internal battery no provision for DC supplying.

E1.4.- Controls

- Display of time (expressed in hours, minutes and seconds) with 6 flat, 7 segments.

- Display intensity adjustment by front panel potentiometer

- Code level alarm (red light)

E2.- Design (figure 7)

Unit is designed along with three mains sub-assemblies.

E2.1.- Clock

The 1 Khz pulse extracted from code is divided down to 1Hz. This 1 Hz pulse feeds a Time Accumulator (made of divide by 60 and divide by 24 counters)

A parallel access in the TA is installed to allow time setting of this circuit.

Outputs of the TA are:

E2.2.- IRIG B Decoder

This section includes the following parts:

E2.3.- Synchronizing Circuitry

Those circuits are used to perform the coupling between decoder and clock sections

-At frequency level

Jitter on 1Khz extracted from IRIG B code (at output of demodulator may range between 50 and 250 us depending on code level, phase distortion on lines and circuitry balancing. To fullfill the specification of 20 us maximum jitter one need to provide for a phase noise "cleaner"; this is the reason for the Phase Lock Loop we put between the output of demodulator and input of dividing chain.

Performances for this PLL are:

- At Data Level

Decoded 1 Hz pulse is use to synchronize the 1Khz to 1 Hz dividing chain

Parallel data available at output of serial to parallel register is loaded into time accumulator by pulses extracted from that chain.

E3.- Technology and Mechanical

The same general rules for technology as for Time Center may be applied to terminals.

E3.1.- Packing

The whole electronic circuits lays on two printed circuit boards

- one board for the clock, decoder and power supply

- one double (sandwich) board for the display.

E3.2.- Power Supply

Unit supplied by AC mains (220 V +/-10% at 50 Hz +/-2Hz). A power transformer followed by rectifier and filtering capacitors gives the non regulated DC voltages.

- High voltage (180 V) for display tubes is not regulates

- Low voltage (5 V) for logic circuits is regulated.

E3.3.- Mechanical

Unit fits in a 19 inches wide standard with 2 panels unit heigh (88 mm) and 250 mm depth..

Input/output connectors are located on rear panel.

F.- SYSTEM OPERATION

F1.- Initial Time setting

This is done by transporting the Time Base Station to the Bureau International de l'Heure and synchronising the Time keeping module by a 1 Hz reference pulse.

F2.- Normal Operation

In normal operation the Time Base Station outputs the 5 Mhz and 1 Hz signals to the frequency Unit which is in "Locked" mode (provided the AUTO mode and XSC operational) outputs the 5 Mhz issued from cesium to and 1 Hz to the Time code generation.

Time setting

IRIG B Selection

Select on DAU the type of IRIG B code (ST or UT) which is going to send one each group of 15 lines.

F3.- Maintenance Operation

This is the case when removing the Time Base Station to check for stability

-Choose the INTERNAL source in Frequency unit: this switches the PLL off and puts the memory sub-assembly in Memory mode; one can remove now the external frequency source (cesium).

- Their is no difference in operation for the Time Distribution Center.

F4.- Remote Units

One has only feed the unit with an IROG B code (either ST or UT) with proper level (from 0,2 Vpp to 5 Vpp) and switch power on.

We are still working.....

Send Comments to: Agustin Macchino Last update: October 14, 2001